1. Field of the Invention
The present invention relates generally to methods for forming dielectric layers within microelectronic products. More particularly, the present invention relates to methods for forming dielectric layers with enhanced performance within microelectronic products.
2. Description of the Related Art
Semiconductor products are formed from semiconductor substrates within and upon which are formed semiconductor devices and over which are formed patterned conductor layers which are separated by dielectric layers.
Common in the art of semiconductor fabrication are field effect devices. Field effect devices are generally conductor-dielectric-semiconductor devices where charge carrier concentration within a semiconductor channel region is modulated by charge injection into a conductor gate electrode separated from the semiconductor channel region by a gate dielectric layer. A particularly common field effect device is a metal oxide semiconductor field effect transistor (MOSFET) device.
While field effect devices such as MOSFET devices have become common in the art of semiconductor fabrication, field effect devices are nonetheless not entirely without problems.
In that regard, as field effect device dimensions have decreased, it has become increasingly difficult to fabricate gate dielectric layers with diminished thickness and enhanced performance.
It is thus towards the foregoing object that the present invention is directed.
Various methods have been disclosed within the semiconductor fabrication art for forming semiconductor devices and semiconductor structures with desirable properties.
Included among the methods, but not limited among the methods, are methods disclosed within: (1) Tseng et al., in U.S. Pat. No. 5,712,208 (a method for forming a composite gate dielectric layer for use within a field effect device); (2) Torek, in U.S. Pat. No. 6,194,286 (a method for selectively etching a thermally grown silicon oxide layer with respect to vapor deposited silicon oxide layer); and (3) Boyd et al., in U.S. Pat. No. 6,271,094 (a method for forming a field effect device with reduced overlap capacitance).
Desirable are additional methods for forming, with diminished thickness and enhanced performance, gate dielectric layers within field effect devices within semiconductor product.
It is towards the foregoing object that the present invention is directed.
A first object of the present invention is to provide a method for forming a gate dielectric layer for use within a field effect device within a semiconductor product.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the gate dielectric layer is formed with diminished thickness and enhanced performance.
In accord with the foregoing objects, the present invention provides a method for forming a dielectric layer.
To practice the method of the present invention, there is first provided an oxidizable substrate. There is then thermally oxidized the oxidizable substrate to form a thermal oxide layer thereupon. There is then deposited upon the thermal oxide layer a nitride layer to form a composite deposited nitride/thermal oxide stack layer upon the oxidizable substrate. There is then annealed the composite deposited nitride/thermal oxide stack layer within a nitriding atmosphere to form therefrom a nitrided composite deposited nitride/thermal oxide stack layer. There is then annealed the nitrided composite deposited nitride/thermal oxide stack layer within an oxidizing atmosphere to form therefrom an oxidized nitrided composite deposited nitride/thermal oxide stack layer. Finally, there is then treated the oxidized nitrided composite deposited nitride/thermal oxide stack layer with a vaporous hydrofluoric acid material.
Within the invention, the oxidizable substrate may include, but is not limited to, an oxidizable semiconductor substrate. The dielectric layer may similarly include, but is not limited to, a gate dielectric layer formed upon the oxidizable semiconductor substrate.
The present invention provides a method for forming, with diminished thickness and enhanced performance, a gate dielectric layer for use within a field effect device.
The present invention realizes the foregoing object by forming a deposited nitride/thermal oxide stack layer upon an oxidizable substrate, which may be an oxidizable semiconductor substrate. The deposited nitride/thermal oxide stack layer may be employed for forming a gate dielectric layer within the field effect device. The deposited nitride/thermal oxide stack layer is sequentially: (1) annealed within a nitriding atmosphere; (2) annealed within an oxidizing atmosphere; and (3) treated with a vaporous hydrofluoric acid material.